The present invention relates generally to the formation of semiconductor and other films and, in particular, the formation of such films using collimated sputtering techniques.
Sputtering describes a number of physical techniques commonly used, for example, in the semiconductor industry for the deposition of thin films of various metals and other materials on a substrate such as a glass plate or a semiconductor wafer. In general, physical vapor deposition (PVD) sputtering techniques involve producing a gas plasma of ionized inert gas, such as argon (Ar). Particles of the ionized gas are attracted to a xe2x80x9ctargetxe2x80x9d material by an applied electric field in an evacuated chamber. The ionized particles collide with the target. As a result of the collisions, free atoms or groups of atoms of the target material are ejected from the surface of the target, essentially converting the target material to the vapor phase comprised of free atoms or molecules. In the low pressure range, near 1 milliTorr (mTorr) of Ar pressure, most of the free particles which escape the target surface in the direction of the substrate strike the substrate without intervening collisions with the Ar gas and form a thin film on the surface of the substrate being processed.
One common sputtering technique is magnetron sputtering in which a magnetic field is used to concentrate sputtering action in the region of the magnetic field so that the target sputtering occurs at a higher rate and at a lower process pressure. The target, which is biased electrically with respect to the substrate and the chamber, functions as a cathode.
Although direct current (DC) techniques for supplying a target with an electric potential are effective with a metallic or conducting target material, DC magnetron sputtering generally has not been employed in the fabrication of thin semiconducting films for commercial electronic devices. Rather, radio frequency alternating current (AC) power commonly is utilized for supplying the electric potential to an insulating target material, such as intrinsic silicon (Si). A high frequency potential, however, generates a plasma effect so as to bombard the film with charged particles of the plasma during the film""s deposition and growth, thereby causing damage to the film.
The electronic and other properties of Si differ considerably depending on the degree of crystallinity of the material (see FIG. 1). In particular, factors affecting the electronic and optical properties of silicon include the degree of crystallinity, the grain size and distribution, and the orientation of the grains. Other factors affecting the properties of Si films include the defect distributions in the grains, on the grain boundaries and in the interstitial phase, as well as physical defects such as voids or pinholes, which are caused by poor nucleation at the beginning of film growth. Such factors affect properties such as the final density of the film, the film""s index of refraction, its ability to absorb light, and the conductivity of carriers, among others.
For example, thin films of sputtered silicon are generally amorphous when deposited in a vacuum by sputtering at low temperature. Amorphous films are referred to as xe2x80x9calphaxe2x80x9d or xe2x80x9caxe2x80x9d type films and have a low fraction of crystalline composition. Amorphous silicon (axe2x80x94Si) sputtered films also generally have high defect distributions which limit their performance. The defects can significantly reduce the electron and hole flux in devices such as transistors and solar cells.
Although the electron mobility of axe2x80x94Si is generally sufficient for thin film transistor (TFT) applications such as a TFT flat panel liquid crystal display (TFT-LCD), the minority carrier mobility and lifetime are severely limited by trapped charge, by the concentration of vacancy defects, and by other grain boundary-related defects. Similarly, reactive sputtered Si in hydrogen has excessive electron spin resonance so that the band-gap and mobility are not useful for solar cell or other optical detection devices. Thus, due to the defect distributions and a low degree of crystallinity, sputtered Si films generally have a high deposited sheet resistivity and are not useful for electronic applications requiring high conductivity. Consequently, sputtered a-Si thin films are not used in commercial applications such as TFT LCDs or thin solar voltaic films.
Poly-crystalline silicon (poly-Si) also is used in many electronic devices, including the fabrication of TFT-LCD devices. Depending on the degree of crystallinity, the size and orientation of the crystals, the kind of defects and their distribution in the crystals and on the boundaries, poly-Si films can have very high carrier mobility and good transistor properties for use in integrated microelectronic devices. Previously developed techniques, such as a silane and disilane plasma enhanced chemical vapor deposition (PECVD), can provide the desired electronic properties such as electron mobility, but require a relatively high substrate temperature of approximately 550 degrees Celsius (xc2x0 C.) or higher. Similarly, annealing processes used to form poly-Si from an a-Si precursor film also require substrate temperatures which are above 650xc2x0 C. for annealing on the order of days and near 850xc2x0 C. for annealing on the order of hours. Such high temperatures prevent those techniques from being used with low temperature substrates like the glass substrates used in LCD applications or low cost plastic substrates.
Although the use of poly-Si is desirable in many applications, previous chemical vapor deposition (CVD) techniques and PVD techniques have not provided a combination of useful deposition rates, uniform wide area substrate capability and useful degrees of crystallinity for commercial applications. For example, it is difficult to provide highly uniform thin films on large glass substrates having dimensions on the order of about 550 millimeters (mm) by 650 mm and larger.
To deposit such poly-Si or micro-crystalline Si, a number of difficulties must be overcome. Those difficulties include the energetic and kinetic barriers to crystal nucleation, in other words, the difficulties in starting crystal growth, particularly at temperatures below the annealing point of the material to be deposited and at small crystal grain sizes. Even the time and temperature conditions used for annealing result in initial grains having diameters of hundreds of angstroms (xc3x85), poor quality and high defect density, rather than high quality grains of 50 to 100 xc3x85 in diameter.
Many semiconductor devices also include one or more dielectric layers. For example, a metal-oxide-semiconductor (MOS) transistor includes a metal gate, an oxide or other dielectric layer, and a high mobility semiconducting layer such as Si. The performance of the transistor junction depends, in part, on the quality of the semiconductor to dielectric interface. Defects at the interface and within several hundred xc3x85 of the interface can cause a decrease in switching performance of the transistor. In addition, the breakdown threshold of the dielectric limits the minimum thickness of the gate dielectric. Since the conductance of a transistor is proportional to the gate capacitance, it is inversely proportional to the thickness of the dielectric layer. A thinner dielectric layer results in higher current. A typical silicon nitride thickness, which has been used as a dielectric layer in TFT-LCDs, is in the range of about 1500-2000 xc3x85. Thinner dielectric films, however, have not been possible at low temperatures without annealing due to dielectric breakdown.
Sputtering also generally has not been used in the fabrication of optical thin films, such as laser mirror coatings, because the threshold of ablation depends on the vacancies, the trapped charge concentration and the physical defects such as pinholes and voids. Such defects scatter light and degrade optical signals which is particularly problematic in low light or high resolution applications.
In general, according to one aspect, a method of depositing a layer of a semiconductor material having a pre-selected degree of crystallinity includes providing a substrate in an evacuable chamber and providing a source of the semiconductor material in the chamber spaced from the substrate. The source of semiconductor material is sputtered with a gas plasma. Trajectories of sputtered semiconductor particles are collimated to a surface of the substrate using a collimator having an aspect ratio selected to form on the substrate surface a film of semiconductor material having the pre-selected degree of crystallinity.
According to another aspect, a method of depositing a layer of a dielectric material having a pre-selected degree of crystallinity or a pre-selected strength (volts per centimeter) includes providing a substrate in an evacuable chamber and providing a target material in the chamber spaced from the substrate. The target material is sputtered with a gas plasma, and a reactive gas is provided in a vicinity of the sputtered target material. Trajectories of sputtered particles are collimated to a surface of the substrate using a collimator having an aspect ratio selected to form on the substrate surface a dielectric material having the pre-selected degree of crystallinity or the pre-selected strength.
According to another aspect, a method of fabricating an electronic device having an electrically active junction includes forming a semiconductor layer and forming a dielectric layer, wherein at least one of the semiconductor layer and the dielectric layer is formed by collimated sputtering, and wherein the semiconductor and dielectric layers are disposed adjacent one another to form the electrically active junction.
In yet a further aspect, a method of fabricating an electronic device having an electrically active junction includes forming an intrinsic semiconductor layer and a doped semiconductor layer of a first conductivity type, wherein at least one of the intrinsic and doped layers is formed using collimated sputtering and wherein the intrinsic and doped layers are disposed adjacent one another to form the electrically active junction.
As described in greater detail below, collimated sputtering can be used in the formation of various semiconductor and dielectric layers of integrated electronic devices including, for example, transistors, flat panel displays, and devices for emitting or detecting light, among others. Collimated sputtering can be used to deposit, for example, one or more layers that form an electrically active interface, such as a rectifying junction between a semiconductor layer and a dielectric layer or an ohmic junction between intrinsic and doped semiconductor materials. Collimated sputtering also can be used to form optical thin films that are used, for example, in precision or high powered optics.
In some implementations, a substrate on which the sputtered material is to be deposited is isolated electrically from charged plasma particles. For example, a collimator can be grounded or biased electrically to prevent charged plasma particles from reaching the substrate. Alternatively, where collimation of the sputtered particles is not required, a conducting grid with a small aspect ratio, for example, an aspect ratio less than 0.5, can be mounted between the target material and the substrate and can be grounded or electrically biased to isolate the substrate from the charged plasma particles.
Various implementations of the present invention include one or more of the following advantages. Greater flexibility is provided in forming layers of semiconductor and dielectric materials of varying degrees of crystallinity at relatively low temperatures. In particular, a pre-selected degree of crystallinity, from amorphous material to poly-crystalline material can be obtained by selecting an appropriate aspect ratio for the collimator used during a sputtering process. In general, a high aspect ratio favors nucleation and crystal growth of the sputtered material, although the rate of transmission of the sputtered material through the collimator decreases with increasing aspect ratio.
Moreover, at a given temperature, the degree of crystallinity can be enhanced as much as two to ten times by collimated sputtering when compared to a film formed without collimation. Alternatively, the use of collimation can provide a given degree of crystallinity at a lower temperature compared to a non-collimated process. If the temperature is decreased, the collimated process eventually will cease to nucleate crystalline films. Nevertheless, at such a very low temperature, a film deposited by the collimated process can have a higher density and can exhibit higher acoustical impedance and higher dielectric breakdown strength.
The crystal orientation of the deposited film also can be tailored by selection of the collimator aspect ratio. For example, the degree to which the adsorbed material will orient itself with the densest crystalline axis perpendicular to the substrate generally increases when a collimator with a large aspect ratio is used. For cubic crystalline material, such as Si, the less than 111 greater than  axis tends to form perpendicular to the plane of the film. Such a crystal orientation can impart important electrical, thermal, and optical transport properties to the film.
In addition, sputtered collimation permits highly crystalline films to be formed at temperatures significantly below the annealing temperature of the sputtered material. Thus, subsequent annealing or remelting steps can be eliminated from some existing processes, thereby reducing the number of required fabrication steps and increasing the throughput of the system. Moreover, the use of low temperatures allows films of substantially greater crystallinity and carrier mobility to be fabricated on glass and other low temperature substrates. The use of collimated sputtering, for example, with a uniform, full-face magnetron can improve the uniformity of a deposited layer. of material. Uniformities of about 2 precent can be obtained for layers deposited on glass substrates having dimensions on the order of about 550 millimeters (mm) by 650 mm, 650 mm by 830 mm, and larger.
Additionally, thin semiconductor and dielectric films can be formed at low temperatures with a reduced number of voids and vacancies. Trapped charge defects also can be reduced by grounding the collimator or conducting grid to provide electrical isolation between the charged plasma particles and the substrate on which the sputtered layer is to be formed. Thus, for example, dielectric films having a thickness as small as several hundred A can be formed to fabricate high trans-conductance devices with high breakdown strengths. Additionally, devices can be fabricated with improved electrically active interfaces, such as a rectifying junction between a semiconductor layer and a dielectric layer or an ohmic junction between intrinsic and doped semiconductor materials.
Other features and advantages will be apparent from the detailed description, the accompanying drawings and the claims.